So, with a rudimentary understanding of data transfer, typically bits are transmitted once per full clock cycle, on the rising edge of the clock's wave. Double-pumping instead transmits twice per cycle, on both the rising and falling edge of the clock's wave. Quad-pumping goes further, by transmitting on both clock edges, and also at the peaks between them (if my understanding is wrong, please correct!).
Is there a reason that we can't always quad-pump? Is there such thing as octo-pumping, and if not, what's stopping us? What is the limiting factor? I figured these questions would all have similar answers so I folded them into just one submission, hopefully that's ok.
Quad-pumping goes further, by transmitting on both clock edges, and also at the peaks between them (if my understanding is wrong, please correct!).
There's a second clock in QDR that's phase-shifted, transfers occur on the rising and falling edges of the second out-of-phase clock as well.
If you don't have that second clock, you can't do QDR. Intel introduced this second clock in its "Willamette-core Pentium 4 processor, and was subsequently employed in its Atom, Pentium 4, Celeron, Pentium D and Core 2 processor ranges" according to the Wikipedia article on "Quad Pumping."
Why not "go higher"? I think this from the Wikipedia article is the key:
"A naïve implementation of QDR would result in the data rate being higher than the clock rate, negating any simple electrical advantage."
Basically, I think DDR makes RAM go at the clock speed of the CPU, and there is no advantage if it goes higher. Where QDR helps increase speed is by relieving contention between multiple devices that want to access memory at once.
So the real question is "why not more clocks"? I bet it's because each clock is probably at least one pin on the CPU and that real-estate is pretty limited. There may be interference concerns as well if more than 2 clocks are present. It's a good question.
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